High-efficiency grating coupler based on fast directional optimization and robust layout strategy in 130 nm CMOS process.

We experimentally demonstrated a high-efficiency grating coupler by combining an interleaved etch and apodized structure for fiber-to-chip coupling. The grating coupler was optimized using the fast directional optimization method to achieve apodization. The grating coupler utilized a layout strategy involving an extended mask to avoid alignment errors for a multi-etch structure. The coupling efficiency was measured to be -2.2 dB at a wavelength of 1549 nm with a 3 dB bandwidth of 47 nm. The grating coupler, having no gold reflector, subwavelength index matching structure, or additional material layers, was fabricated using a commercial silicon photonics process with a minimum feature size of 140 nm. This grating coupler design provides a robust and effective coupling scheme and the proposed method can be employed to adopt the design in accordance with standard foundry design rules.